1. Field of the Invention
The present invention relates to an image signal processing circuit and a vehicle running guiding apparatus in which a three-dimensional object placed in the forward direction of travel of a vehicle is detected, for example, with a charge coupled device (CCD) mounted on the vehicle to give the alarm when there is a possibility of danger or when the vehicle goes off a white line denoting a boundary of a road area.
2. Description of Related Art
A vehicle running guiding apparatus using an image signal processing circuit is described in brief with reference to FIG. 6 and FIG. 7.
FIG. 6 is a block diagram briefly showing a conventional image signal processing circuit arranged in a vehicle running guiding apparatus, and FIG. 7 is a block diagram of the conventional image signal processing circuit shown in FIG. 6. As shown in FIG. 6, a conventional image signal processing circuit is composed of a stereo optical system 1 for photographing a plurality of three-dimensional objects placed in the forward direction of travel of a user""s vehicle to produce a stereo image of the three-dimensional objects at regular time-intervals, a stereo image processing unit 2, having a stereo image processing function, for calculating a three-dimensional distribution of distance between the user""s vehicle and the group of three-dimensional objects according to data of the stereo image produced in the stereo optical system 1 for each frame of stereo image, a distance-and-image processing computer 3 for receiving the three-dimensional distance distribution calculated in the stereo image processing unit 2 as distance distribution information and calculating both a right-side clearance distance and a left-side clearance distance according to the distance distribution information, and an informing unit 4 for sending information of the right-side clearance distance and the left-side clearance distance calculated in the distance-and-image processing computer 3 to a driver (or the user). The distance-and-image processing computer 3 is composed of a three-dimensional object detecting unit 3A for quickly detecting a three-dimensional position of a side wall, which denotes a long-continued three-dimensional object arranged on a side of a road (for example, a fence or a guard rail indicating a boundary of a road), and a plurality of three-dimensional positions of a group of three-dimensional objects placed on a road (for example, other vehicles, pedestrians and buildings) according to the distance distribution information, and a clearance distance calculating unit 3B for calculating a right-side nearest distance between an extending line of a right-side end of the user""s vehicle in the forward direction and the group of three-dimensional objects, of which the three-dimensional positions are detected in the three-dimensional object detecting unit 3A, as the right-side clearance distance, calculating a left-side nearest distance between an extending line of a left-side end of the user""s vehicle in the forward direction and the group of three-dimensional objects as the left-side clearance distance.
As shown in FIG. 7, the stereo optical system 1 is composed of a camera 1a, which is placed on the right side of the user""s vehicle, for photographing the three-dimensional objects at regular time-intervals to produce a right-side image of the stereo image, and a camera 1b, which is placed on the left side of the vehicle, for photographing the three-dimensional objects at regular time-intervals to produce a left-side image of the stereo image. The stereo image processing unit 2 is composed of a distance detecting circuit 2a for calculating an image difference between the right-side image and the left-side image composing the stereo image and detecting a three-dimensional distribution of the distance between the user""s car and the group of three-dimensional objects according to the image difference, and a distance-and-image memory 2b for storing the image data and distance distribution information denoting the three-dimensional distribution of the distance detected in the distance detecting circuit 2a. The distance-and-image processing computer 3 has a microprocessor 3a, which corresponds to the three-dimensional object detecting unit 3A, for detecting the three-dimensional position of the group of three-dimensional objects placed on the road according to the object detecting processing, a microprocessor 3b, which corresponds to the three-dimensional object detecting unit 3A, for detecting the three-dimensional position of the side wall according to the side wall detecting processing, and a microprocessor 3c, which corresponds to the clearance distance calculating unit 3B for calculating the clearance distance between the user""s vehicle and the group of three-dimensional objects including the side wall.
Also, the distance-and-image processing computer 3 has an interface circuit 3e connected with the distance-and-image memory 2b, a read only memory (ROM) 3f for storing a control program, a random access memory (RAM) 3g for storing a plurality of types of parameters which are used in the calculation performed in the microprocessors 3a, 3b and 3c, an output memory 3h for storing a plurality of parameters obtained as a result of the calculation, a display controller 3i for controlling the informing unit 4, and an interface circuit 3j for receiving a signal sent from a vehicle speed sensor 5, a rudder angle sensor 6 or a mode setting switch 7. A rudder angle of a steering wheel is detected in the rudder angle sensor 6. The mode setting switch 7 is used to select a supporting mode. The microprocessors 3a, 3b and 3c, the interface circuit 3e, the ROM 3f, the RAM 3g, the output memory 3h, the display controller 3i and the interface circuit 3j are connected in parallel with each other through a system bus 3d. Also, memory areas of both the ROM 3f and RAM 3g used for the microprocessor 3a, memory areas of both the ROM 3f and RAM 3g used for the microprocessor 3b and memory areas of both the ROM 3f and RAM 3g used for the microprocessor 3c differ from each other. Therefore, in the distance-and-image processing computer 3, the object detecting processing and the side wall detecting processing are performed in parallel to each other according to the image data and the distance distribution information of the stereo image processing unit 2. When the mode setting switch 7 is operated by the driver to output a prescribed signal, the processing for calculating a clearance distance between the vehicle and the three-dimensional object is performed in response to the prescribed signal according to the image data of the three-dimensional objects and the distance distribution information, and information of the clearance distance is displayed in the informing unit 4.
However, in the conventional image signal processing circuit, data or information is sent through the single system bus (or bus line) 3d in the distance-and-image processing computer 3. Therefore, even though it is desired to send the image data and the distance distribution information from the stereo image processing unit 2 to the RAM 3g through the system bus 3d when communication is performed between the RAM 3g and the microprocessor 3a (or 3b or 3c), it is impossible to immediately send the image data and the distance distribution information, and the sending of the image data and the distance distribution information is delayed until the system bus 3d is set to a non-use state by the completion of the communication performed through the system bus 3d. Therefore, there is a problem that the distance-and-image processing computer 3 is not efficiently performed.
An object of the present invention is to provide, with due consideration to the drawbacks of the conventional image signal processing circuit, an image signal processing circuit and a vehicle running guiding apparatus in which image data is sent to a RAM without wasting time to smoothly perform signal processing in each central processing unit (or microprocessor). That is, the operation of a central processing unit is interrupted, the image data is efficiently sent to a RAM by using a direct memory access (DMA) transfer circuit, the operation of the central processing unit is restarted, information indicating the sending of the image data to the RAM is sent to the central processing unit, and the data processing is smoothly performed in the central processing unit according to the image data.
The object is achieved by the provision of an image signal processing circuit comprising a plurality of image data outputting units for outputting a plurality of pieces of image data, an image processor for outputting the pieces of image data output from the image data outputting units as a frame of image data, a plurality of random access memories for respectively storing the frame of image data output from the image processor, and a plurality of central processing units, which are arranged in one-to-one correspondence with the random access memories, for respectively performing signal processing according to the frame of image data stored in the corresponding random access memory. The image signal processing circuit further comprises a direct memory access transfer circuit, which is arranged between the image processor and the group of central processing units, for interrupting the signal processing of one central processing unit, writing the frame of image data output from the image processor in one random access memory corresponding to the central processing unit, making the central processing unit restart the signal processing after the writing of the frame of image data in the random access memory and sending information, which indicates that the frame of image data is written in the random access memory during the interruption of the central processing unit, to the central processing unit.
In the above configuration, the direct memory access transfer circuit is arranged to write image data to the random access memory corresponding to each central processing unit by interrupting the execution of a program used in the central processing unit. Accordingly, the processing time required to process the image data and the distance distribution information in each microprocessor can be shortened. That is, the image data can be efficiently sent to the random access memory of each central processing unit through the direct memory access transfer circuit, and the processing for the image data can be smoothly performed in each central processing unit.
It is preferred that the direct memory access transfer circuit of the image signal processing circuit writes the same frame of image data output from the image processor in each of the random access memories, and a type of the signal processing, which is performed in each central processing unit according to the frame of image data written in the corresponding random access memory, differs from types of the signal processing performed in the other central processing units. For example, it is preferred that a distance calculation is performed in one of the central processing units, and the formation of a three-dimensional image is performed in another central processing unit.
Therefore, various types of signal processing can be efficiently performed in the central processing units.
It is also preferred that the image signal processing circuit further comprises a DPRAM, which is connected with the central processing units, for storing a plurality of calculation results obtained according to the signal processing performed in the central processing units so as to be possible to use any of the calculation results in each central processing unit.
Therefore, a calculation result of one central processing unit can be efficiently used in another central processing unit through the DPRAM.
It is also preferred that the image signal processing circuit further comprises an interruption control circuit, which is connected with the central processing units, for controlling the interruption of each central processing unit to interrupt one central processing unit in cases where a calculation result obtained according to the signal processing performed in another central processing unit is supplied to the interrupted central processing unit.
Therefore, because the signal processing in the central processing unit, in which a calculation result of another central processing unit is received, is interrupted, the transmission of the calculation result between the central processing units can be efficiently performed.
It is also preferred that the image signal processing circuit further comprises a display control unit for controlling the display of a calculation result which is obtained in each central processing unit according to the signal processing and is sent from the central processing unit through a DPRAM at regular intervals, wherein the display control unit has a failure judging unit for judging that a failure occurs in one central processing unit in cases where the calculation result of the central processing unit is not sent to the DPRAM.
Therefore, the occurrence of a failure in one central processing unit, in which a calculation result is not obtained, can be immediately ascertained in the image signal processing circuit.
It is also preferred that the image signal processing circuit further comprises a display control unit for setting an address corresponding to one central processing unit, and a bus access gate circuit for outputting a bus release request signal to the central processing unit corresponding to the address set by the display control unit, outputting a signal to the direct memory access transfer circuit to interrupt a direct memory access transfer of the direct memory access transfer circuit, ascertaining that the central processing unit releases a bus, and reading out or writing data from/in a memory or the random access memory corresponding to the central processing unit.
Therefore, because the direct memory access transfer of the direct memory access transfer circuit is interrupted, data of the display control unit can be written in a memory of the central processing unit through the bus access gate circuit, or data written in a memory of the central processing unit can be read out to the display control unit through the bus access gate circuit. Accordingly, data transmission between the display control unit and a memory of each central processing unit can be efficiently performed even though the direct memory access transfer is performed by the direct memory access transfer circuit.
It is also preferred that the image signal processing circuit further comprises a bus access gate circuit for supplying diagnosis data and an address of the diagnosis data to one central processing unit corresponding to a diagnosis operation, writing the diagnosis data in the address of a memory of the central processing unit, and reading out the diagnosis data from the memory of the central processing unit, and a comparing circuit for comparing the diagnosis data read out by the bus access gate circuit with the diagnosis data supplied to the central processing unit by the bus access gate circuit to perform the diagnosis of the memory of the central processing unit.
Therefore, it is judged in a display control unit having the comparing unit whether or not a failure occurs in the memory of the central processing unit.
It is also preferred that a vehicle running guiding apparatus comprises a stereo image processing unit for calculating a three-dimensional distance distribution in a stereo image which is obtained by photographing a three-dimensional object, which is placed in a forward direction of travel of a vehicle, with a pair of photographing units arranged on the right and left sides of the vehicle, a three-dimensional object detecting unit for detecting a three-dimensional position of the three-dimensional object placed on a road according to the three-dimensional distance distribution calculated by the stereo image processing unit, a clearance distance calculating unit for calculating a right-side nearest distance between an end of the three-dimensional object, of which the three-dimensional position is detected by the three-dimensional object detecting unit, and an extending line of a right end of the vehicle, calculating a left-side nearest distance between another end of the three-dimensional object and an extending line of a left end of the vehicle and setting both the right-side nearest distance and the left-side nearest distance as a clearance distance, and an informing unit for informing information indicating the clearance distance calculated by the clearance distance calculating unit. The image processor is applied to the stereo image processing unit, one central processing unit is applied to the three-dimensional object detecting unit, and another central processing unit is applied to the clearance distance calculating unit.
In the above configuration, the three-dimensional distance distribution calculated in the stereo image processing unit corresponds to the image data output from the image processor, the three-dimensional position of the three-dimensional object detected by the three-dimensional object detecting unit corresponds to a calculation result obtained in one central processing unit according to the signal processing, and the clearance distance calculated by the clearance distance calculating unit corresponds to a calculation result obtained in another central processing unit according to the signal processing.
Accordingly, the image signal processing circuit can be applied to the vehicle running guiding apparatus.